专利摘要:
The control loop for a digital controller of a rotating electrical excitation machine is suitable for generator operation delivering an output voltage adjusted by an excitation current. The digital regulator comprises means for controlling the excitation current and the regulation loop comprises, at the input, measuring means by sampling the output voltage generating a measurement signal (Um), error calculating means (13) generating an error signal (e) equal to a difference between the measurement signal (Um) and a set value (Uo), processing means (14, 15, 16, 17, 18, 20) an error signal (e) generating a control signal (Ysat) comprising in parallel a first amplifier (14), an integrator (15) and an anti-saturation system (23), and comprising, at the output, means for generating a control signal (PWM) controlling the control means as a function of the control signal (Ysat). According to the invention, the anti-saturation system (23) is conditional detection (24).
公开号:FR3013528A1
申请号:FR1361327
申请日:2013-11-19
公开日:2015-05-22
发明作者:Pierre Chassard;Pierre Tisserand;Laurent Labiste;Geoffrey Massemin
申请人:Valeo Equipements Electriques Moteur SAS;
IPC主号:
专利说明:

[0001] COMPREHENSIVE PROPORTIONAL REGULATION LOOP FOR A DIGITAL REGULATOR DEVICE OF A ROTATING ELECTRIC MACHINE WITH EXCITATION OF A MOTOR VEHICLE TECHNICAL FIELD OF THE INVENTION The present invention relates to an integral proportional control loop for a digital control device of a rotating electric machine with motor vehicle excitation.
[0002] BACKGROUND ART OF THE INVENTION. In a manner known per se, a rotating electrical excitation machine is, unlike an electric machine with permanent magnets, capable of producing a motor torque, or of supplying electrical energy, only when its inductor is traversed by a excitation current.
[0003] A common type of rotating electrical excitation machine, widely used in the automotive field for alternator and starter functions, includes a rotating inductor and a multi-winding stator. When the machine is operating as an alternator, the current generated in the stator windings by the rotating inductor is rectified so as to deliver a direct current to the battery of the vehicle. This voltage depends on the rotational speed of the inductor, the connected load and the excitation current. For automotive applications, the output voltage must be regulated so as to remain constant regardless of the rotation speed of the alternator and regardless of the charge of the battery. To do this, the output voltage is measured and compared to a setpoint value by a regulator device which controls the excitation current so as to minimize any difference. The company VALEO ELECTRICAL EQUIPMENT MOTOR has already proposed to perform this regulation from measurements by sampling using digital techniques, which provide substantial advantages over conventional analog methods, especially in its European patents EP 0 481 862 and EP 0 802 606. In the design of a modern controller, the servo-control of the output voltage to a setpoint is based on the theorization of a proportional control loop (P) or proportional integral (IP). The corresponding algorithms adapted to the specifications of automobile manufacturers can for example be implemented in an FPGA (acronym for "Field Programmable Gate Array" in English, that is to say "programmable gate-end integrated circuit 5") associated with an ASIC (acronym for "Application Specific Integrated Circuit"), which manages the analog interface with the alternator having characteristics specific to the equipment manufacturer, as shown the article "An High Voltage CMOS Voltage Regulator for Automotive Alternators with Programmable Functionalities and Full Reverse Polarity Capabilities", P. Chassard, L. Labiste, P. Tisserand et al., Design, Automation & Testing in Europe Conference & Exhibition ( DATE), 2010, EDAA. The use of FPGA makes it possible, in particular, to implement improvements to conventional PI control loops, such as anti-saturation systems, an example of which is given in the article "Presentation of an Efficient Design Methodology for FPGA. Systems, Application to the Design of Antiwindup PI Controller, L. Chaarabi, E. Monmasson, I. SlamaBelkhodja, 28th Annual Conference of the IECON, 2002, IEEE. The authors of this last article show that they get an answer at a level without overflow, but give no indication as to the time of return compared to an open loop. However, in the field of application to regulating devices for motor vehicle alternators, the inventive entity has identified a need for a regulation loop that makes it possible to obtain a return time during a transient of a control mode. open loop to the shortest possible linear regulation mode, that is to say to find a regulated voltage level expected as quickly as possible. GENERAL DESCRIPTION OF THE INVENTION The object of the present invention is to satisfy this need and precisely relates to an integral proportional control loop for a digital control device of a rotating electric machine with motor vehicle excitation. This machine is of the type capable of operating as a generator delivering an output voltage adjusted by an excitation current. The digital regulator device comprises excitation current control means and the regulation loop which comprises: input, measurement means by sampling the output voltage generating a measurement signal; error calculating means generating an error signal equal to a difference between the measurement signal and a setpoint value; means for processing this error signal generating a regulation signal comprising in parallel a first amplifier, an integrator and an antisaturation system; at the output, means for generating a control signal controlling the control means as a function of the regulation signal. The regulation loop according to the invention is remarkable in that the anti-saturation system is conditional detection. It benefits from the fact that this anti-saturation system comprises a saturation detector generating a disconnection signal controlling a switch disconnecting the integrator from the error calculating means when a saturation state of the control signal is detected. . Advantageously, the integrator is a pure digital integrator, preferably having a first transfer function of the form: FT0 (z) = a1-Z-1. Alternatively, very advantageously, the integrator is a low-pass digital filter , preferably having a second transfer function of the form: 1- (1) A cut-off frequency of this digital filter is substantially in a frequency band ranging from 10 mHz to 1 Hz. The regulation loop according to the invention Further advantageously comprises a second amplifier in series with the integrator, which benefits from the fact that an integrating gain of this second amplifier has a predetermined value so as to reduce a static error while ensuring stability of the digital controller device. In the regulation loop according to the invention, the switch disconnecting the integrator is advantageously controlled further by a signal of progressive load control FT1 (z) b = - 4 - These few essential specifications will have made obvious to the skilled person the advantages provided by the invention compared to the state of the prior art. The detailed specifications of the invention are given in the description which follows in conjunction with the accompanying drawings. It should be noted that these drawings have no other purpose than to illustrate the text of the description and do not constitute in any way a limitation of the scope of the invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagrammatic representation of an excitation electric machine known from the state of the art, provided with a digital regulator device comprising a regulation loop, and its use on the on-board electrical system. motor vehicle. Figure 2 is a block diagram of a control loop of the digital controller device shown in Figure 1, of a "proportional integral" type known from the state of the art and including an anti-saturator circuit. Figure 3 is a block diagram of an integral proportional control loop in a first preferred embodiment of the invention. Figure 4 is a set of timing diagrams showing a first one-step response of the control loop shown in Figure 3. Figure 5 is a detailed block diagram of an integral proportional control loop in a second embodiment. preferred embodiment of the invention. FIG. 6 is a frequency response curve of a low pass digital filter implemented in the control loop shown in FIG. 5. FIG. 7 shows the operating principle of a conditional detection anti-saturation system. implemented in the regulation loop according to the invention. Figure 8 is a set of timing diagrams showing a second one-step response of the control loop shown in Figure 5. DESCRIPTION OF THE PREFERRED EMBODIMENTS OF THE INVENTION The rotating electrical excitation machine shown schematically in Figure 1 is, by way of example, a three-phase alternator 1 provided with a digital regulator device 2. - 5 - The stator 3 of the alternator 1 comprises three windings subject the rotating field created by the inductor 4 traversed by an excitation current I e. The alternating current produced in the stator 3 is rectified by a rectifying block 5 and filtered by a capacitor 6 so that the alternator 1 delivers a continuous output voltage Ub + to the battery 7 and to the vehicle's vehicle power supply network 8. charges 9 (a connection by a power cable being schematized by an inductor L and a resistor R). The output voltage Ub + of the alternator 1 is kept constant by means of a regulation loop 10, when the load 9 and the rotation speed CI vary, by acting on control means 11 of the excitation current I. e from measurements 12 by sampling this output voltage Ub +. The control means 11 of the excitation current I e generally consist of power transistors 11 operating in commutation and controlled by a rectangular signal of variable duty cycle PWM. In the most recent generators 1 known from the state of the art, the regulation loop 10 is most often a proportional or proportional integral control loop equipped with a calculated feedback anti-saturation system of the type shown on FIG. FIG. 2. The regulation loop 10 comprises, in input, measurement means 20 constituted generally by an analog-digital converter for sampling the output voltage Ub + of the alternator 1 and generating a measurement signal Um which is compared with a value of Uo. Error calculating means 13 generate, with a first operator "Diff_1", an error signal e equal to a difference between the measurement signal Uni and the setpoint value Uo. In the parallel structure shown in FIG. 2, the error signal e is amplified by a first amplifier 14 having a predetermined proportional gain Kp and is integrated by an integrator 15. An output voltage Sa of the first amplifier 14 and a voltage of output 30 Si of the integrator 15 are summed 16 to produce an intermediate control signal Y. A saturation block 17 makes it possible to adapt the data format of the regulation loop 10 to that of means for generating the PWM control signal at the output, providing a Y-sal control signal from the intermediate control signal Y. This control loop of a known type further comprises a computed feedback anti-saturation system 18, the operation of which is as follows: - Unsaturated mode.
[0004] A Ydiff quantity represents a difference between an error generation before saturation Y and after saturation Y - sat realized by a second operator "Diff_2" 19. When the loop is unsaturated, the quantity Ydiff is zero and does not disturb the operation of the integral proportional loop 10 (with a second integrating gain amplifier K, in series with the integrator 15 having a first form transfer function FT = 1 / s). The anti-saturation system 18 is considered disconnected. Mathematically, SI (Y = Ysal) THEN e, = e where e, is an intermediate error signal at the input of the second amplifier 20 preceding the integrator 15. - Saturated mode The quantity Ydiff is non-zero in saturated mode.
[0005] The magnitude Ydiff in saturated mode attenuates more or less significantly (according to a saturator gain KI, m of an additional amplifier 21) the loop error s, generated by the integral part 15, 20 via a difference made by a third operator "Diff_3" 22. Mathematically, SI (11 # 1esat) THEN e = e - Khm. (Y-Ysat) It should be noted that the structure of the "computed feedback anti-saturation system" type 18 comprises two difference operators ("Diff_2" 19 and "Diff_3" 22) and a Kin amplifier applied to a pure integrator 15.
[0006] The problem encountered in this type of circuit known from the state of the art is to obtain a return time during the transient from the saturated mode to the unsaturated mode that is the most efficient possible for application to an alternator regulator. A proportional integral control loop 10 according to the invention, comprising, unlike the control loops known in the technical state, a conditional detection anti-saturation system 23, makes it possible to optimize the return time. to unsaturated mode. A block diagram of the regulation loop 10 in a first preferred embodiment of the invention is shown in FIG. 3.
[0007] According to the invention, the integral part 15, 20 of the regulation loop 10 comprising the second amplifier 20 and the integrator 15 is connected or disconnected by the anti-saturation system 23 as a function of the saturation state of the regulation signal Y-sal- To do this, the anti-saturation system 23 comprises a saturation detector 24 which generates a disconnection signal Cmd controlling a switch 25 applying on the input of the second amplifier 20, either the error signal e, or a voltage having a predetermined value such as the zero value, zero value set in FIG. 3 by grounding 26. The operation of this anti-saturation system 23 in the integral proportional control loop 10 according to the invention is the following: - Unsaturated mode When the disconnection signal Cmd is in a logic zero state, the unsaturated mode is detected. The switch 25 connects the error signal e to the input 20 of the integral part 15, 20 (i.e. with the second integrating gain amplifier K, in series with the integrator 15 having a function FT transfer rate = 1 / s). The anti-saturation system 23 is considered disconnected. Mathematically, 25 SI (Y = Ysat) THEN Cmd = 0 and e, = e. where e, is the intermediate error signal at the input of the second amplifier 20 preceding the integrator 15. Saturated mode When the control signal Cmd is in the logic state 1, the saturated mode is detected. The switch 25 then connects the input of the integral part 15, 20 to a voltage of zero in order to stop the evolution of the output voltage s, of the integral part 15, 20. Mathematically, 35 IF (Y # Ysat) THEN Cmd = 1 and e, = 0 The output voltage s, of the integral part 15, 20 can remain fixed at a constant value during the saturated mode, according to the embodiment. Indeed, the pure integration operator (FT = 1 / s, Laplace's write) performs an operation with respect to the unbounded time [0, + 00 [defined by the mathematical function: + op s, = Ki. f (e,). dt It follows that s, is equal to the value of s, at the time of switching to saturated mode. The corresponding timing diagram of FIG. 4 clearly shows the evolution of the output voltage s, of the integrator 15 of this control loop 10 during a load variation AP (from unsaturated mode nSM to a saturated mode SM but also from the saturated mode SM to an unsaturated mode nSM). After a first transient state Tri resulting from the delay between the load variation AP and its output by the saturation detector 24, the intermediate error signal e at the input of the second amplifier 20 preceding the integrator 15 is forced to a zero value 27 as a result of the control of the switch 25 by the disconnection signal Cmd. During the entire duration of the saturated mode SM, the output voltage s of the integrator 15 is thus fixed 28. After a second transient state Tr2 resulting from the delay between the end of the charge variation AP and its detection by the detector saturation 24, the intermediate error signal e, at the input of the second amplifier 20 preceding the integrator 15 is equal to the error signal e as a result of the control of the switch 25 by the disconnection signal Cmd. The conditional detection anti-saturation system 23 makes it possible to obtain a first return time AT1 in unsaturated mode close to the optimum. However, as has already been mentioned, the problem encountered in this type of circuit is to obtain a return time during the transient Tr2 from the saturated mode SM to the unsaturated mode nSM the most efficient possible with respect to the application. In a second preferred embodiment of the invention, the detailed block diagram of which is given in FIG. 5, the inventive entity replaced the pure integrator 15 of the first embodiment with a filter for the purpose. Low-pass 29. That is, the pure integrator 15 having a first form transfer function FT = 1 / s is replaced by a filter 29 having a second transfer function of the form FT = 1 / (1 + Ts) (where s is the Laplace mathematical variable, and is the filter time constant). The low-pass filter 29 is preferably digital second transfer function of the form (transformed in z): FT1 (z) = 1- (1- Figure 6 shows the frequency response of this filter 29 with respect to a 10 pure digital integrator 15 having a first function of transfer of the form: FT0 (z) = a-Z-1 j.2n- The plot in the plane of Bode is carried out by the transformation Z (f) = e fe. The parameters chosen are: 1 a = with a sampling frequency fe, for example 64 kHz 2`u 15 for the first transfer function of the pure integrator 15, b = -1 with a sampling frequency fe = 64 kHz for the second transfer function 22o low pass filter 29. Preferably, the frequency fe is chosen to be greater than the PWM control frequency ("Pulse Width Modulation") of the excitation current of the alternator and well above the ripple frequency of the DC voltage output of the alternator. whereas, beyond the cut-off frequency, for example fc = 30 mHz, the behavior of the low-pass filter 29 (solid curve 30) and that of the pure integrator 15 (dashed curve 31) are identical . The low frequency gain is set by the integrator gain K, of the second amplifier 20 in front of the low pass filter 29, of predetermined value, in order to increase the gain of the loop to decrease the static error. As is evident from the timing diagrams of FIG. 8, corresponding to the second preferred embodiment of the invention, the use of this low-pass filter 29 makes it possible to reduce the output voltage value SLpF of the pass filter. 10 - down 29 during the saturated mode SM to a zero value 32 and to obtain a control loop of the type P (proportional only) in saturated mode SM. Indeed, by applying a zero voltage 27 to the input eLpF of the low-pass filter 29 during the saturated mode SM, the value of the output voltage sLpF of the filter goes low 29 decreases exponentially according to an equation of the type: sLpF ( t) = and / T With: sLpF: output filter voltage low pass 29 t: time variable T: filter time constant 10 As shown in the timing diagrams in Figure 8, a P-type control loop presents the advantage of having good reactivity during transients from saturated mode SM to unsaturated mode nSM. By associating the implementation of a low-pass filter 29 for the realization of the integral part 20, 29 of the regulation loop 10 to the conditional detection 15 of the saturation 23, a second return time AT2 of the saturated mode SM to unsaturated mode nSM is extremely low on applications equipped with an alternator 1 with battery 7 compared to a return time of a calculated feedback antisurface system 18 known from the state of the art (Figure 2), but also compared to the very low initial AT1 return time of the conditional detection anti-saturation system 23 equipped with a pure integrator 15 (FIG. 3). The connection by the switch 25, controlled by the saturation detector 24, of the low-pass filter 29, of very low cut-off frequency fc, in the integral part 20, 29 of the regulation loop 10 makes it possible to obtain a very good behavior. close to a pure integrator during the nSM unsaturated mode control. The advantage of this low-pass filter 29 is that it can simply control the output level sLpF of the filter 29 when the saturation SM of the loop is detected (via the disconnection signal Cmd) to a predetermined zero value 32 from FIG. a voltage value of zero forced 27 at the input of the low-pass filter 29 by means of the switch 25. This switch 25 makes it possible, according to the state of the saturation of the loop 10, to connect the input eLpF of the pass filter. down to the error signal e of the regulation loop 10 in case of unsaturation nSM or to select the de-saturation of the low-pass filter 29 in case of saturation SM detected of the regulation loop 10. - 11 - The advantage of this electronic device 33 is to allow the fast passage to a P-type regulation in case of saturation detection SM, and a fast return to a regulated value expected in the case where the saturation is no longer detected nSM .
[0008] The set of elements of the second preferred embodiment of a PI regulation loop 10 according to the invention is shown in FIG. 5, as well as other details: input signal 12 representing the voltage of the battery 7 or the voltage of the "B +" terminal of the alternator 1; - Analogue filtering 34 (anti-aliasing filter, anti-ripple voltage), associated with the analog-digital converter 35 and voltage divider 34 to adapt the voltage level for the analog-digital converter 35; - analog digital converter 35; error calculation means 13 between the measurement signal Urn and the setpoint value Uo; digital setpoint 36 generating the desired setpoint value U0; anti-aliasing filter 37 associated with the decimation produced by the generation of the PWM control signal; first amplifier 14 of the proportional part of the regulation loop 10 (proportional gain Kp adjusted to guarantee the stability of the regulator device 2 connected to the alternator 1 connected to the battery 7); - adder block 16 between the proportional part 14 and the integral part 20, 29; saturation block 17 making it possible to adapt the data format of the regulation loop 10 to that of generation means 38 of the PWM control signal between a minimum value Ymm and a maximum value Ymax; generation means 38 of the PWM control signal (controlling the control means 11 of the excitation current e of the alternator 1), realized by a comparison between a triangular reference signal (also called a "tooth of saw ") and the Y - sot regulation signal from the saturation block 17; switch 25 connecting or disconnecting the integral part 20, 29 as a function of the disconnection signal Cmd generated by the saturation block 17 and of an auxiliary signal of the regulator function, in particular a combined progressive load control signal LRC 39; Second amplifier 20 (with an integrating gain K, adjusted to ensure the stability of the regulator device 2 connected to the alternator 1 connected to the battery 7); - low pass filter 29 fc very low frequency cutoff frequency realizing the integral portion 20, 29 of the control loop 10; - Cmd disconnection signal of the switch 25 representing the saturation of the control loop 10 generated by the saturation detector 24; - PWM control signal controlling the power electronics 11 controlling the excitation current the alternator 1; - Auxiliary signal LRC for inhibiting the integral part 20, 29 of the control loop 10 by an ancillary regulator function, such as a load control control signal (English terminology). The implementation of the saturation detection in the saturation detector 24 is performed by a digital algorithm illustrated in FIG. 7. The following signals are used for the saturation detection: Y: intermediate control signal at the input of the saturator block 17; Ysal: control signal at the output of the saturator block 17; Cmd: Disconnect control signal. The saturation detection algorithm is as follows: IF (Y = Ysal) THEN Cmd = 0 20 ELSE Cmd = 1 It goes without saying that the above description would apply in similar terms to other models of rotary electric machines with excitation that the three-phase alternator shown in Figure 1. The numerical values indicated correspond to experimental developments and computer simulations carried out by the applicant company, and are given only as examples. The invention therefore embraces all the possible variants of embodiment that would remain within the scope defined by the claims below.
权利要求:
Claims (10)
[0001]
CLAIMS1) Integral proportional control loop (10) for a digital regulator device (2) of a motor vehicle rotating electrical excitation machine (1) of the type capable of operating as a generator delivering an output voltage (Ub +) adjusted by a excitation current (1c), said digital regulating device (2) comprising control means (11) for said excitation current (Ic) and said regulating loop (10) comprising: - input, measuring means ( 35) by sampling said output voltage (Ub +) generating a measurement signal (Uni); error calculating means (13) generating an error signal (e) equal to a difference between said measurement signal (Uni) and a setpoint value (Uo); processing means (14, 15, 16, 17, 18, 20) of said error signal (e) generating a control signal (Ysat) comprising in parallel a first amplifier (14), an integrator (15) and an anti-saturation system (18); at the output, means (38) for generating a control signal (PWM) controlling said control means (11) as a function of said regulation signal (Ysat); characterized in that said anti-saturation system (23) is conditionally sensing (24).
[0002]
2) Integral proportional control loop (10) for a digital regulator device (2) of a motor vehicle rotating electrical machine (1) according to claim 1, characterized in that said anti-saturation system (23) comprises a saturation detector (24) generating a disconnect signal (Cmd) controlling a switch (25) disconnecting said integrator (15, 29) from said error calculating means (13) upon detection of a saturation state (SM) ) of said regulation signal (Ysat). 30
[0003]
3) Integral proportional control loop (10) for a digital control device (2) of a motor vehicle rotating electrical machine (1) according to claim 2, characterized in that said integrator (15, 29) is a digital integrator pure (15) .- 14 -
[0004]
4) Integral proportional control loop (10) for a digital regulator device (2) of a motor vehicle rotating electrical machine (1) according to claim 3, characterized in that said digital integrator (15) has a first function of transfer of the form: FT0 (z) a = 1-Z-1
[0005]
5) Integral proportional control loop (10) for a digital regulator device (2) of a motor vehicle rotating electrical machine (1) according to claim 2, characterized in that said integrator (15, 29) is a filter digital low-low (29).
[0006]
6) Integral proportional control loop (10) for a digital control device (2) of a motor vehicle rotating electrical machine (1) according to claim 5, characterized in that said digital filter (29) has a second function of transfer of the form: FT1 (z) = 1- (1-
[0007]
7) Integral proportional control loop (10) for a digital regulator device (2) of a motor vehicle rotating electrical excitation machine (1) according to claim 6, characterized in that a cutoff frequency (fa) of said filter digital (29) is in a frequency band from 10 mHz to 1 Hz.
[0008]
8) Integral proportional control loop (10) for a digital control device (2) for a motor vehicle rotating electrical machine (1) according to one of the preceding claims 2 to 7, characterized in that it comprises further a second amplifier (14) in series with said integrator (15, 29). 30
[0009]
9) Integral proportional control loop (10) for a digital control device (2) of a motor vehicle rotating electrical machine (1) according to claim 9, characterized in that an integrating gain (K) of said second amplifier ( 14) has a predetermined value so as to decrease a static error while ensuring stability of said digital controller (2).
[0010]
10) Integral proportional control loop (10) for a digital regulator device (2) of a motor vehicle rotating electrical excitation machine (1) according to any one of the preceding claims 2 to 9, characterized in that said switch (25) ) is further controlled by a progressive load control signal (LRC).
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法律状态:
2015-11-30| PLFP| Fee payment|Year of fee payment: 3 |
2016-11-30| PLFP| Fee payment|Year of fee payment: 4 |
2017-11-30| PLFP| Fee payment|Year of fee payment: 5 |
2018-11-29| PLFP| Fee payment|Year of fee payment: 6 |
2020-10-16| ST| Notification of lapse|Effective date: 20200910 |
优先权:
申请号 | 申请日 | 专利标题
FR1361327A|FR3013528B1|2013-11-19|2013-11-19|INTEGRATED PORTIONAL CONTROL RING FOR A DIGITAL REGULATOR DEVICE OF A ROTATING ELECTRIC MACHINE WITH EXCITATION OF A MOTOR VEHICLE|FR1361327A| FR3013528B1|2013-11-19|2013-11-19|INTEGRATED PORTIONAL CONTROL RING FOR A DIGITAL REGULATOR DEVICE OF A ROTATING ELECTRIC MACHINE WITH EXCITATION OF A MOTOR VEHICLE|
US15/035,439| US10193480B2|2013-11-19|2014-11-17|Proportional integral regulating loop for digital regulator device for motor vehicle excitation rotary electrical machine|
CN201480063327.1A| CN105745834B|2013-11-19|2014-11-17|For the proportional integration regulating loop of the digital governer device of motor vehicles excitation electric rotating machine|
EP14809935.1A| EP3072231B1|2013-11-19|2014-11-17|Proportional integral regulating loop for a digital regulator device for automotive vehicle excitation rotating electric machine|
PCT/FR2014/052936| WO2015075363A1|2013-11-19|2014-11-17|Proportional integral regulating loop for a digital regulator device for automotive vehicle excitation rotating electric machine|
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